[all-commits] [llvm/llvm-project] a25833: [X86] Add test cases for missed opportunity to use...

[topperc via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: a258338d627170f204c40ebe93ea7fb18c7c1197
      https://github.com/llvm/llvm-project/commit/a258338d627170f204c40ebe93ea7fb18c7c1197
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2020-08-02 (Sun, 02 Aug 2020)

  Changed paths:
    M llvm/test/CodeGen/X86/parity.ll

  Log Message:
  -----------
  [X86] Add test cases for missed opportunity to use a byte test instruction instead of an xor with 0 in parity patterns.

If the input to the ctpop fits in 8 bits, we can use the parity
flag from a TEST instruction, but we're currently XORing with 0.


  Commit: 64516ec7c1298a4cb16980db49c2f9466f0f3ab5
      https://github.com/llvm/llvm-project/commit/64516ec7c1298a4cb16980db49c2f9466f0f3ab5
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2020-08-02 (Sun, 02 Aug 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/parity.ll
    M llvm/test/CodeGen/X86/vector-reduce-xor-bool.ll

  Log Message:
  -----------
  [X86] Use parity flag from byte test/cmp instruction for __builtin_parity when input fits in 8 bits.

If the upper bits of the __builtin_parity idiom are known to be
0 we were previously emitting an xor with 0 to get the parity flag.
But we can use cmp/test instead which may expose opportunities for
load folding or combining an AND.


Compare: https://github.com/llvm/llvm-project/compare/e7a8ee00e6c3...64516ec7c129