[all-commits] [llvm/llvm-project] ee3fee: TableGen/GlobalISel: Allow output instructions wit...

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: ee3feef5aaaa3c385fbe08bdb2d48829ad440b56
      https://github.com/llvm/llvm-project/commit/ee3feef5aaaa3c385fbe08bdb2d48829ad440b56
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-07-27 (Mon, 27 Jul 2020)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir
    M llvm/test/TableGen/Common/GlobalISelEmitterCommon.td
    A llvm/test/TableGen/GlobalISelEmitter-output-discard.td
    M llvm/utils/TableGen/GlobalISelEmitter.cpp

  Log Message:
  -----------
  TableGen/GlobalISel: Allow output instructions with multiple defs

The DAG behavior allows matchching input patterns with a single result
to the first result of an output instruction that defines multiple
results. The remaining defs are implicitly dead.

This starts to fix using manual selection for AMDGPU add/sub (although
it's still needed, mostly because it's also still needed for
G_PTR_ADD).