[all-commits] [llvm/llvm-project] ee7caa: Reland [llvm-exegesis] Add benchmark latency optio...

[Vy Nguyen via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: ee7caa75939afb75547c00744c5df4d04d45e517
      https://github.com/llvm/llvm-project/commit/ee7caa75939afb75547c00744c5df4d04d45e517
  Author: Vy Nguyen <vyng at google.com>
  Date:   2020-07-27 (Mon, 27 Jul 2020)

  Changed paths:
    M llvm/docs/CommandGuide/llvm-exegesis.rst
    A llvm/test/tools/llvm-exegesis/X86/lbr/Inputs/mov_add.att
    A llvm/test/tools/llvm-exegesis/X86/lbr/lit.local.cfg
    A llvm/test/tools/llvm-exegesis/X86/lbr/mov-add.s
    M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
    M llvm/tools/llvm-exegesis/lib/PerfHelper.cpp
    M llvm/tools/llvm-exegesis/lib/PerfHelper.h
    M llvm/tools/llvm-exegesis/lib/X86/CMakeLists.txt
    M llvm/tools/llvm-exegesis/lib/X86/Target.cpp
    A llvm/tools/llvm-exegesis/lib/X86/X86Counter.cpp
    A llvm/tools/llvm-exegesis/lib/X86/X86Counter.h
    M llvm/tools/llvm-exegesis/llvm-exegesis.cpp

  Log Message:
  -----------
  Reland [llvm-exegesis] Add benchmark latency option on X86 that uses LBR for more precise measurements.

        Starting with Skylake, the LBR contains the precise number of cycles between the two
        consecutive branches.
        Making use of this will hopefully make the measurements more precise than the
        existing methods of using RDTSC.

                Differential Revision: https://reviews.llvm.org/D77422

New change: check for existence of field `cycles` in perf_branch_entry before enabling this mode.
This should prevent compilation errors when building for older kernel whose headers don't support it.