[all-commits] [llvm/llvm-project] 6f961a: AMDGPU/GlobalISel: Legalize GDS atomics

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 6f961a1e7ec2373dceda74a1a49f93b009db1b72
      https://github.com/llvm/llvm-project/commit/6f961a1e7ec2373dceda74a1a49f93b009db1b72
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-07-26 (Sun, 26 Jul 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    A llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomic-cmpxchg-region.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-fadd-region.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-atomicrmw-xchg-region.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Legalize GDS atomics

I noticed these don't use the _gfx9, non-m0 reading variants but not
sure if that's a bug or not. It's the same in the DAG.


  Commit: bcf5184a68d1d851895692bae6eed16a74b519db
      https://github.com/llvm/llvm-project/commit/bcf5184a68d1d851895692bae6eed16a74b519db
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-07-26 (Sun, 26 Jul 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Make sure <2 x s1> phis are scalarized


  Commit: 7c09c173a294698d06bcd1cd8c95fd331a31ccdc
      https://github.com/llvm/llvm-project/commit/7c09c173a294698d06bcd1cd8c95fd331a31ccdc
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-07-26 (Sun, 26 Jul 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

  Log Message:
  -----------
  AMDGPU/GlobalISel: Reorder G_CONSTANT legality rules

The legal cases should be the first rules.


  Commit: 3e8bb7a00027c97fcf0025c9e068593d8c0ed71d
      https://github.com/llvm/llvm-project/commit/3e8bb7a00027c97fcf0025c9e068593d8c0ed71d
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-07-26 (Sun, 26 Jul 2020)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptr-add.mir

  Log Message:
  -----------
  GlobalISel: Handle fewerElementsVector for G_PTR_ADD


  Commit: f6176f8a5f02d7c3ee6d3b70c46045cfdce230d4
      https://github.com/llvm/llvm-project/commit/f6176f8a5f02d7c3ee6d3b70c46045cfdce230d4
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-07-26 (Sun, 26 Jul 2020)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ptr-add.mir

  Log Message:
  -----------
  GlobalISel: Handle G_PTR_ADD in narrowScalar


Compare: https://github.com/llvm/llvm-project/compare/581915999565...f6176f8a5f02