[all-commits] [llvm/llvm-project] 4f6502: AMDGPU/GlobalISel: Replace selection tests for G_C...

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 4f6502ab3356f51f711b57001ab596f1bc66fd3a
      https://github.com/llvm/llvm-project/commit/4f6502ab3356f51f711b57001ab596f1bc66fd3a
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-07-26 (Sun, 26 Jul 2020)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fconstant.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Replace selection tests for G_CONSTANT/G_FCONSTANT

Split into separate tests and make more consistent with the others.


  Commit: 4033aa1467d6ea0cb5289ed9db2f4e3cc015eac1
      https://github.com/llvm/llvm-project/commit/4033aa1467d6ea0cb5289ed9db2f4e3cc015eac1
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-07-26 (Sun, 26 Jul 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-and.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-private.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ptrmask.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-xor.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sbfe.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ubfe.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Sign extend integer constants

This matches the DAG behavior and fixes immediate folding


  Commit: 61ced4b87a80b65d89b2b84418038efde704b9ed
      https://github.com/llvm/llvm-project/commit/61ced4b87a80b65d89b2b84418038efde704b9ed
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-07-26 (Sun, 26 Jul 2020)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll

  Log Message:
  -----------
  GlobalISel: Handle 'n' inline asm constraint


Compare: https://github.com/llvm/llvm-project/compare/b1731da87159...61ced4b87a80