[all-commits] [llvm/llvm-project] fcc55c: [AArch64][GlobalISel] Use wzr/xzr for 16 and 32 bi...

[Jessica Paquette via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: fcc55c0952f4e4b30326badd6fb11fa06be2b6fd
      https://github.com/llvm/llvm-project/commit/fcc55c0952f4e4b30326badd6fb11fa06be2b6fd
  Author: Jessica Paquette <jpaquette at apple.com>
  Date:   2020-07-24 (Fri, 24 Jul 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/select-store.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Use wzr/xzr for 16 and 32 bit stores of zero

We weren't performing this optimization on 16 and 32 bit stores. SDAG happily
does this though.

e.g. https://godbolt.org/z/cWocKr

This saves about 0.2% in code size on CTMark at -O3.

Differential Revision: https://reviews.llvm.org/D84568