[all-commits] [llvm/llvm-project] 809600: [llvm][sve] Reg + Imm addressing mode for ld1ro.

[Francesco Petrogalli via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 809600d6642773f71245f76995dab355effc73af
      https://github.com/llvm/llvm-project/commit/809600d6642773f71245f76995dab355effc73af
  Author: Francesco Petrogalli <francesco.petrogalli at arm.com>
  Date:   2020-07-24 (Fri, 24 Jul 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrFormats.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    A llvm/test/CodeGen/AArch64/sve-intrinsics-ld1ro-addressing-mode-reg-imm.ll

  Log Message:
  -----------
  [llvm][sve] Reg + Imm addressing mode for ld1ro.

Reviewers: kmclaughlin, efriedma, sdesmalen

Subscribers: tschuett, hiraditya, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D83357