[all-commits] [llvm/llvm-project] d720ba: [X86][SSE] SimplifyDemandedVectorEltsForTargetNode...

[Simon Pilgrim via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: d720ba1e4b66f0619958fb980e22e8243b3064b0
      https://github.com/llvm/llvm-project/commit/d720ba1e4b66f0619958fb980e22e8243b3064b0
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-07-23 (Thu, 23 Jul 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/combine-sdiv.ll
    M llvm/test/CodeGen/X86/combine-sra.ll
    M llvm/test/CodeGen/X86/combine-srl.ll
    M llvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll
    M llvm/test/CodeGen/X86/urem-seteq-vec-nonzero.ll
    M llvm/test/CodeGen/X86/urem-seteq-vec-splat.ll

  Log Message:
  -----------
  [X86][SSE] SimplifyDemandedVectorEltsForTargetNode - add SSE shift multiple use handling

Add SimplifyMultipleUseDemandedVectorElts peek through for imm/var SSE shifts