[all-commits] [llvm/llvm-project] 2a6c87: [InstCombine] Move target-specific inst combining

[Sebastian Neubauer via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 2a6c871596ce8bdd23501a96fd22f0f16d3cfcad
      https://github.com/llvm/llvm-project/commit/2a6c871596ce8bdd23501a96fd22f0f16d3cfcad
  Author: Sebastian Neubauer <sebastian.neubauer at amd.com>
  Date:   2020-07-22 (Wed, 22 Jul 2020)

  Changed paths:
    M clang/test/CodeGen/thinlto-distributed-newpm.ll
    M llvm/include/llvm/Analysis/TargetTransformInfo.h
    M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
    M llvm/include/llvm/CodeGen/BasicTTIImpl.h
    M llvm/include/llvm/IR/Function.h
    A llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
    M llvm/lib/Analysis/TargetTransformInfo.cpp
    M llvm/lib/IR/Function.cpp
    A llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    A llvm/lib/Target/AMDGPU/InstCombineTables.td
    M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
    M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
    M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
    M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
    M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
    M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
    M llvm/lib/Target/X86/CMakeLists.txt
    A llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
    M llvm/lib/Target/X86/X86TargetTransformInfo.h
    M llvm/lib/Transforms/InstCombine/CMakeLists.txt
    M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineAtomicRMW.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
    M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
    M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
    R llvm/lib/Transforms/InstCombine/InstCombineTables.td
    M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
    M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
    M llvm/test/CodeGen/Thumb2/mve-intrinsics/predicates.ll
    M llvm/test/CodeGen/Thumb2/mve-intrinsics/vadc-multiple.ll
    M llvm/test/CodeGen/Thumb2/mve-vpt-from-intrinsics.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/ldexp.ll
    M llvm/test/Transforms/InstCombine/ARM/mve-v2i2v.ll
    M llvm/test/Transforms/InstCombine/ARM/neon-intrinsics.ll
    M llvm/test/Transforms/InstCombine/NVPTX/nvvm-intrins.ll
    M llvm/test/Transforms/InstCombine/X86/X86FsubCmpCombine.ll
    M llvm/test/Transforms/InstCombine/X86/addcarry.ll
    M llvm/test/Transforms/InstCombine/X86/clmulqdq.ll
    M llvm/test/Transforms/InstCombine/X86/x86-avx2.ll
    M llvm/test/Transforms/InstCombine/X86/x86-avx512.ll
    M llvm/test/Transforms/InstCombine/X86/x86-bmi-tbm.ll
    M llvm/test/Transforms/InstCombine/X86/x86-insertps.ll
    M llvm/test/Transforms/InstCombine/X86/x86-masked-memops.ll
    M llvm/test/Transforms/InstCombine/X86/x86-movmsk.ll
    M llvm/test/Transforms/InstCombine/X86/x86-pack.ll
    M llvm/test/Transforms/InstCombine/X86/x86-pshufb.ll
    M llvm/test/Transforms/InstCombine/X86/x86-sse.ll
    M llvm/test/Transforms/InstCombine/X86/x86-sse2.ll
    M llvm/test/Transforms/InstCombine/X86/x86-sse41.ll
    M llvm/test/Transforms/InstCombine/X86/x86-sse4a.ll
    M llvm/test/Transforms/InstCombine/X86/x86-vec_demanded_elts.ll
    M llvm/test/Transforms/InstCombine/X86/x86-vector-shifts.ll
    M llvm/test/Transforms/InstCombine/X86/x86-vpermil.ll
    M llvm/test/Transforms/InstCombine/X86/x86-xop.ll

  Log Message:
  -----------
  [InstCombine] Move target-specific inst combining

For a long time, the InstCombine pass handled target specific
intrinsics. Having target specific code in general passes was noted as
an area for improvement for a long time.

D81728 moves most target specific code out of the InstCombine pass.
Applying the target specific combinations in an extra pass would
probably result in inferior optimizations compared to the current
fixed-point iteration, therefore the InstCombine pass resorts to newly
introduced functions in the TargetTransformInfo when it encounters
unknown intrinsics.
The patch should not have any effect on generated code (under the
assumption that code never uses intrinsics from a foreign target).

This introduces three new functions:
TargetTransformInfo::instCombineIntrinsic
TargetTransformInfo::simplifyDemandedUseBitsIntrinsic
TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic

A few target specific parts are left in the InstCombine folder, where
it makes sense to share code. The largest left-over part in
InstCombineCalls.cpp is the code shared between arm and aarch64.

This allows to move about 3000 lines out from InstCombine to the targets.

Differential Revision: https://reviews.llvm.org/D81728