[all-commits] [llvm/llvm-project] bef56f: [AArch64][SVE] Correctly allocate scavenging slot ...

[sdesmalen-arm via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: bef56f7fe2382ed1476aa67a55626b364635b44e
      https://github.com/llvm/llvm-project/commit/bef56f7fe2382ed1476aa67a55626b364635b44e
  Author: Sander de Smalen <sander.desmalen at arm.com>
  Date:   2020-07-22 (Wed, 22 Jul 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
    A llvm/test/CodeGen/AArch64/framelayout-scavengingslot.mir
    A llvm/test/CodeGen/AArch64/framelayout-sve-basepointer.mir
    A llvm/test/CodeGen/AArch64/framelayout-sve-scavengingslot.mir
    M llvm/test/CodeGen/AArch64/framelayout-sve.mir

  Log Message:
  -----------
  [AArch64][SVE] Correctly allocate scavenging slot in presence of SVE.

This patch addresses two issues:

* Forces the availability of the base-pointer (x19) when the frame has
  both scalable vectors and variable-length arrays. Otherwise it will
  be expensive to access non-SVE locals.

* In presence of SVE stack objects, it will allocate the emergency
  scavenging slot close to the SP, so that they can be accessed from
  the SP or BP if available. If accessed from the frame-pointer, it will
  otherwise need an extra register to access the scavenging slot because
  of mixed scalable/non-scalable addressing modes.

Reviewers: efriedma, ostannard, cameron.mcinally, rengolin, david-arm

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D70174