[all-commits] [llvm/llvm-project] a679f2: GlobalISel: Consistently get TII from MIRBuilder

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: a679f27e98d5048ec18959c8be84cfce1f0c999c
      https://github.com/llvm/llvm-project/commit/a679f27e98d5048ec18959c8be84cfce1f0c999c
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-07-20 (Mon, 20 Jul 2020)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

  Log Message:
  -----------
  GlobalISel: Consistently get TII from MIRBuilder


  Commit: 57aae47056d74408524ae11b052a04159c42eb9e
      https://github.com/llvm/llvm-project/commit/57aae47056d74408524ae11b052a04159c42eb9e
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-07-20 (Mon, 20 Jul 2020)

  Changed paths:
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll

  Log Message:
  -----------
  AArch64/GlobalISel: Fix hardcoded registers in error message checks


  Commit: 93311a981283775031113c5a6db0591f03357b7b
      https://github.com/llvm/llvm-project/commit/93311a981283775031113c5a6db0591f03357b7b
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-07-20 (Mon, 20 Jul 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fceil.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-trunc.mir

  Log Message:
  -----------
  AMDGPU/GlobalISel: Fix custom lowering of llvm.trunc.f64 for SI

This was missing an operand from BFE and not erasing the original
instruction.


  Commit: 5cbd4e415eecc0fd0fd83b478279d08a36efb0cc
      https://github.com/llvm/llvm-project/commit/5cbd4e415eecc0fd0fd83b478279d08a36efb0cc
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-07-20 (Mon, 20 Jul 2020)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir

  Log Message:
  -----------
  GlobalISel: Don't handle widenScalar for vector G_INSERT

This handling didn't make any sense for vectors.


  Commit: 100564bdf87d4ce621d646482a7e589bb2815292
      https://github.com/llvm/llvm-project/commit/100564bdf87d4ce621d646482a7e589bb2815292
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-07-20 (Mon, 20 Jul 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

  Log Message:
  -----------
  AMDGPU/GlobalISel: Remove outdated comment


Compare: https://github.com/llvm/llvm-project/compare/7fadd7006932...100564bdf87d