[all-commits] [llvm/llvm-project] 76c22b: [RISCV] Add support for -mcpu option.

Zakk Chen via All-commits all-commits at lists.llvm.org
Mon Jul 20 06:44:03 PDT 2020


  Branch: refs/heads/release/11.x
  Home:   https://github.com/llvm/llvm-project
  Commit: 76c22b392f18e533262de8db2fec5e6e25e0bd8b
      https://github.com/llvm/llvm-project/commit/76c22b392f18e533262de8db2fec5e6e25e0bd8b
  Author: Zakk Chen <zakk.chen at sifive.com>
  Date:   2020-07-20 (Mon, 20 Jul 2020)

  Changed paths:
    M clang/lib/Basic/Targets/RISCV.cpp
    M clang/lib/Basic/Targets/RISCV.h
    M clang/lib/Driver/ToolChains/Arch/RISCV.cpp
    M clang/lib/Driver/ToolChains/CommonArgs.cpp
    M clang/test/Driver/riscv-arch.c
    A clang/test/Driver/riscv-cpus.c
    M clang/test/Misc/target-invalid-cpu-note.c
    A llvm/include/llvm/Support/RISCVTargetParser.def
    M llvm/include/llvm/Support/TargetParser.h
    M llvm/lib/Support/TargetParser.cpp
    M llvm/lib/Target/RISCV/RISCV.td

  Log Message:
  -----------
  [RISCV] Add support for -mcpu option.

Summary:
1. gcc uses `-march` and `-mtune` flag to chose arch and
pipeline model, but clang does not have `-mtune` flag,
we uses `-mcpu` to chose both infos.
2. Add SiFive e31 and u54 cpu which have default march
and pipeline model.
3. Specific `-mcpu` with rocket-rv[32|64] would select
pipeline model only, and use the driver's arch choosing
logic to get default arch.

Reviewers: lenary, asb, evandro, HsiangKai

Reviewed By: lenary, asb, evandro

Tags: #llvm, #clang

Differential Revision: https://reviews.llvm.org/D71124

(cherry picked from commit 294d1eae75bf8867821a4491f0d67445227f8470)




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