[all-commits] [llvm/llvm-project] e29700: [ScheduleDAG] Move DBG_VALUEs after first term for...

[Florian Hahn via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: e297006d6f02f0f54a69223b98defde09c43158f
      https://github.com/llvm/llvm-project/commit/e297006d6f02f0f54a69223b98defde09c43158f
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2020-07-17 (Fri, 17 Jul 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/MachineInstr.h
    M llvm/lib/CodeGen/MachineInstr.cpp
    M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
    M llvm/test/CodeGen/ARM/dbg-tcreturn.ll

  Log Message:
  -----------
  [ScheduleDAG] Move DBG_VALUEs after first term forward.

MBBs are not allowed to have non-terminator instructions after the first
terminator. Currently in some cases (see the modified test),
EmitSchedule can add DBG_VALUEs after the last terminator, for example
when referring a debug value that gets folded into a TCRETURN
instruction on ARM.

This patch updates EmitSchedule to move inserted DBG_VALUEs just before
the first terminator. I am not sure if there are terminators produce
values that can in turn be used by a DBG_VALUE. In that case, moving the
DBG_VALUE might result in referencing an undefined register. But in any
case, it seems like currently there is no way to insert a proper DBG_VALUEs
for such registers anyways.

Alternatively it might make sense to just remove those extra DBG_VALUES.

I am not too familiar with the details of debug info in the backend and
would appreciate any suggestions on how to address the issue in the best
possible way.

Reviewers: vsk, aprantl, jpaquette, efriedma, paquette

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D83561