[all-commits] [llvm/llvm-project] a3ad8f: [MLIR] Add type checking capability to RegionBranc...

[Rahul Joshi via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: a3ad8f92b44d79487a34b1151251b413ef769070
      https://github.com/llvm/llvm-project/commit/a3ad8f92b44d79487a34b1151251b413ef769070
  Author: Rahul Joshi <jurahul at google.com>
  Date:   2020-07-15 (Wed, 15 Jul 2020)

  Changed paths:
    M mlir/include/mlir/Dialect/SCF/SCFOps.td
    M mlir/include/mlir/Interfaces/ControlFlowInterfaces.h
    M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
    M mlir/lib/Dialect/SCF/SCF.cpp
    M mlir/lib/Interfaces/ControlFlowInterfaces.cpp
    M mlir/test/Dialect/SCF/invalid.mlir

  Log Message:
  -----------
  [MLIR] Add type checking capability to RegionBranchOpInterface

- Add function `verifyTypes` that Op's can call to do type checking verification
  along the control flow edges described the Op's RegionBranchOpInterface.
- We cannot rely on the verify methods on the OpInterface because the interface
  functions assume valid Ops, so they may crash if invoked on unverified Ops.
  (For example, scf.for getSuccessorRegions() calls getRegionIterArgs(), which
  dereferences getBody() block. If the scf.for is invalid with no body, this
  can lead to a segfault). `verifyTypes` can be called post op-verification to
  avoid this.

Differential Revision: https://reviews.llvm.org/D82829