[all-commits] [llvm/llvm-project] 02650a: [SVE][CodeGen] Add README for SVE-related warnings...
david-arm via All-commits
all-commits at lists.llvm.org
Tue Jul 14 00:31:39 PDT 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: 02650ac03632ddea38116c859189b2efed7baabd
https://github.com/llvm/llvm-project/commit/02650ac03632ddea38116c859189b2efed7baabd
Author: David Sherwood <david.sherwood at arm.com>
Date: 2020-07-14 (Tue, 14 Jul 2020)
Changed paths:
A llvm/test/CodeGen/AArch64/README
M llvm/test/CodeGen/AArch64/sve-alloca-stackid.ll
M llvm/test/CodeGen/AArch64/sve-bitcast.ll
M llvm/test/CodeGen/AArch64/sve-breakdown-scalable-vectortype.ll
M llvm/test/CodeGen/AArch64/sve-callbyref-notailcall.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-byref.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention-tuple-types.ll
M llvm/test/CodeGen/AArch64/sve-calling-convention.ll
M llvm/test/CodeGen/AArch64/sve-extract-element.ll
M llvm/test/CodeGen/AArch64/sve-extract-subvector.ll
M llvm/test/CodeGen/AArch64/sve-fcmp.ll
M llvm/test/CodeGen/AArch64/sve-fp.ll
M llvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll
M llvm/test/CodeGen/AArch64/sve-gep.ll
M llvm/test/CodeGen/AArch64/sve-insert-element.ll
M llvm/test/CodeGen/AArch64/sve-int-arith-imm.ll
M llvm/test/CodeGen/AArch64/sve-int-arith-pred.ll
M llvm/test/CodeGen/AArch64/sve-int-arith.ll
M llvm/test/CodeGen/AArch64/sve-int-div-pred.ll
M llvm/test/CodeGen/AArch64/sve-int-imm.ll
M llvm/test/CodeGen/AArch64/sve-int-log-imm.ll
M llvm/test/CodeGen/AArch64/sve-int-log-pred.ll
M llvm/test/CodeGen/AArch64/sve-int-log.ll
M llvm/test/CodeGen/AArch64/sve-int-mad-pred.ll
M llvm/test/CodeGen/AArch64/sve-int-mul-pred.ll
M llvm/test/CodeGen/AArch64/sve-int-reduce-pred.ll
M llvm/test/CodeGen/AArch64/sve-intrinsic-opts-ptest.ll
M llvm/test/CodeGen/AArch64/sve-intrinsic-opts-reinterpret.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-adr.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-contiguous-prefetches.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-conversion.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-counting-bits.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-counting-elems.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-create-tuple.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-dup-x.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-32bit-scaled-offsets.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-32bit-unscaled-offsets.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-64bit-scaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-64bit-unscaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-vector-base-imm-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ff-gather-loads-vector-base-scalar-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ffr-manipulation.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith-merging.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-fp-arith.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-fp-compares.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-fp-converts.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-fp-reduce.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-32bit-scaled-offsets.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-32bit-unscaled-offsets.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-scaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-64bit-unscaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-base-imm-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-base-scalar-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-prefetches-scalar-base-vector-indexes.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-prefetches-vect-base-imm-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-gather-prefetches-vect-base-invalid-imm-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-index.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-imm.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith-merging.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-arith.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares-with-imm.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-int-compares.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ld1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ld1-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ld1.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ld1ro-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-ld1ro.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-loads-ff.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-loads-nf.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-logical.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-fp32.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-fp64.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-matmul-int8.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-perm-select.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-pred-creation.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-pred-operations.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-pred-testing.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-reinterpret.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-reversal.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-scalar-to-vec.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-32bit-scaled-offsets.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-32bit-unscaled-offsets.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-64bit-scaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-64bit-unscaled-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-vector-base-imm-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-vector-base-scalar-offset.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-sel.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-shifts-merging.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-shifts.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-sqdec.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-sqinc.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-st1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-st1-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-st1.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-imm-addr-mode.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-stN-reg-reg-addr-mode.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-uqdec.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-uqinc.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-while.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-trunc.ll
M llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll
M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-pred-log.ll
M llvm/test/CodeGen/AArch64/sve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-pred-non-temporal-ldst-addressing-mode-reg-reg.ll
M llvm/test/CodeGen/AArch64/sve-select.ll
M llvm/test/CodeGen/AArch64/sve-setcc.ll
M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-trunc.ll
M llvm/test/CodeGen/AArch64/sve-vector-splat.ll
M llvm/test/CodeGen/AArch64/sve-vscale-combine.ll
M llvm/test/CodeGen/AArch64/sve-vscale.ll
M llvm/test/CodeGen/AArch64/sve-vselect-imm.ll
M llvm/test/CodeGen/AArch64/sve-zeroinit.ll
Log Message:
-----------
[SVE][CodeGen] Add README for SVE-related warnings in tests
I have added a new file:
llvm/test/CodeGen/AArch64/README
that describes what to do in the event one of the SVE codegen tests
fails the warnings check. In addition, I've added comments to all
the relevant SVE tests pointing users at the README file.
Differential Revision: https://reviews.llvm.org/D83467
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