[all-commits] [llvm/llvm-project] 04b9a4: [RISCV] Refactor FeatureRVCHints to make Processor...

[Zakk Chen via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 04b9a46c842f793a2baedcad64de35fcbd3e93b7
      https://github.com/llvm/llvm-project/commit/04b9a46c842f793a2baedcad64de35fcbd3e93b7
  Author: Zakk Chen <zakk.chen at sifive.com>
  Date:   2020-07-09 (Thu, 09 Jul 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCV.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/test/MC/RISCV/rv32c-invalid.s

  Log Message:
  -----------
  [RISCV] Refactor FeatureRVCHints to make ProcessorModel more intuitive

Reviewers: luismarques, asb, evandro

Reviewed By: asb, evandro

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D77030