[all-commits] [llvm/llvm-project] f4bd01: [AMDGPU] Fix and simplify AMDGPUCodeGenPrepare::ex...

[jayfoad via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: f4bd01c1918e90f232a098b4878b52c6f7d4a215
      https://github.com/llvm/llvm-project/commit/f4bd01c1918e90f232a098b4878b52c6f7d4a215
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2020-07-08 (Wed, 08 Jul 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
    M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
    M llvm/test/CodeGen/AMDGPU/bypass-div.ll
    M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
    M llvm/test/CodeGen/AMDGPU/sdiv.ll
    M llvm/test/CodeGen/AMDGPU/udivrem.ll

  Log Message:
  -----------
  [AMDGPU] Fix and simplify AMDGPUCodeGenPrepare::expandDivRem32

Fix the division/remainder algorithm by adding a second quotient
refinement step, which is required in some cases like
0xFFFFFFFFu / 0x11111111u (https://bugs.llvm.org/show_bug.cgi?id=46212).

Also document, rewrite and simplify it by ensuring that we always have a
lower bound on inv(y), which simplifies the UNR step and the quotient
refinement steps.

Differential Revision: https://reviews.llvm.org/D83381


  Commit: ecac951be92b71e5ec887a9fc768f202e4a8ab69
      https://github.com/llvm/llvm-project/commit/ecac951be92b71e5ec887a9fc768f202e4a8ab69
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2020-07-08 (Wed, 08 Jul 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
    M llvm/lib/Target/AMDGPU/CaymanInstructions.td
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
    M llvm/test/CodeGen/AMDGPU/bypass-div.ll
    M llvm/test/CodeGen/AMDGPU/sdiv.ll
    M llvm/test/CodeGen/AMDGPU/udivrem.ll

  Log Message:
  -----------
  [AMDGPU] Fix and simplify AMDGPUTargetLowering::LowerUDIVREM

Use the algorithm from AMDGPUCodeGenPrepare::expandDivRem32.

Differential Revision: https://reviews.llvm.org/D83382


  Commit: a8816ebee01c1f923d928617bb4e55dcc1d7d6da
      https://github.com/llvm/llvm-project/commit/a8816ebee01c1f923d928617bb4e55dcc1d7d6da
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2020-07-08 (Wed, 08 Jul 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-srem.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-udiv.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-urem.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll

  Log Message:
  -----------
  [AMDGPU] Fix and simplify AMDGPULegalizerInfo::legalizeUDIV_UREM32Impl

Use the algorithm from AMDGPUCodeGenPrepare::expandDivRem32.

Differential Revision: https://reviews.llvm.org/D83383


Compare: https://github.com/llvm/llvm-project/compare/c444b1b904b1...a8816ebee01c