[all-commits] [llvm/llvm-project] 2a1967: [mlir] Change ODS to have include and exclude regex

[Jacques Pienaar via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 2a19672af5d58d9ee9f8d6276b57cb584d295eb6
      https://github.com/llvm/llvm-project/commit/2a19672af5d58d9ee9f8d6276b57cb584d295eb6
  Author: Jacques Pienaar <jpienaar at google.com>
  Date:   2020-07-06 (Mon, 06 Jul 2020)

  Changed paths:
    M mlir/test/mlir-tblgen/op-decl.td
    M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp

  Log Message:
  -----------
  [mlir] Change ODS to have include and exclude regex

This makes it easier to have a "remainder" include rule. And also makes it easier to read the command line flag.