[all-commits] [llvm/llvm-project] babbea: [TargetLowering] Improve expansion of FSHL/FSHR by...

[jayfoad via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: babbeafa006f5317ed2162d1e64917422bfb58e7
      https://github.com/llvm/llvm-project/commit/babbeafa006f5317ed2162d1e64917422bfb58e7
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2020-07-06 (Mon, 06 Jul 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

  Log Message:
  -----------
  [TargetLowering] Improve expansion of FSHL/FSHR by non-zero amount

Use a simpler code sequence when the shift amount is known not to be
zero modulo the bit width.

Nothing much uses this until D77152 changes the translation of fshl and
fshr intrinsics.

Differential Revision: https://reviews.llvm.org/D82540