[all-commits] [llvm/llvm-project] cdf84c: [X86] Add test cases for v32i8 rotate with min-leg...

[topperc via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: cdf84c7b6b7a87949921ae23084f37ce74500800
      https://github.com/llvm/llvm-project/commit/cdf84c7b6b7a87949921ae23084f37ce74500800
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2020-07-02 (Thu, 02 Jul 2020)

  Changed paths:
    M llvm/test/CodeGen/X86/min-legal-vector-width.ll

  Log Message:
  -----------
  [X86] Add test cases for v32i8 rotate with min-legal-vector-width=256

We currently don't mark ROTL as custom when avx512bw is enabled
under the assumption we'll be able to promote the shifts in the
rotate idiom. But if we don't have 512-bit registers enabled we
can't promote.


  Commit: 204a21317a33437e7b4746d0414e1dd24fd29053
      https://github.com/llvm/llvm-project/commit/204a21317a33437e7b4746d0414e1dd24fd29053
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2020-07-02 (Thu, 02 Jul 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/min-legal-vector-width.ll

  Log Message:
  -----------
  [X86] Modify the conditions for when we stop making v16i8/v32i8 rotate Custom based on having avx512 features.

The comments here indicate that we prefer to promote the shifts
instead of allowing rotate to be pattern matched. But we weren't
taking into account whether 512-bit registers are enabled or
whethever we have vpsllvw/vpsrlvw instructions.

splatvar_rotate_v32i8 is a slight regrssion, but the other cases
are neutral or improved.


Compare: https://github.com/llvm/llvm-project/compare/08679af900c6...204a21317a33