[all-commits] [llvm/llvm-project] 03fe7e: [MLIR][SPIRVToLLVM] Implementation of spv.BitField...

[George Mitenkov via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 03fe7eb16fa224a95d4ba252e2a03cbb3fa244af
      https://github.com/llvm/llvm-project/commit/03fe7eb16fa224a95d4ba252e2a03cbb3fa244af
  Author: George Mitenkov <georgemitenk0v at gmail.com>
  Date:   2020-07-02 (Thu, 02 Jul 2020)

  Changed paths:
    M mlir/lib/Conversion/SPIRVToLLVM/ConvertSPIRVToLLVM.cpp
    M mlir/test/Conversion/SPIRVToLLVM/bitwise-ops-to-llvm.mlir

  Log Message:
  -----------
  [MLIR][SPIRVToLLVM] Implementation of spv.BitFieldInsert pattern

This patch introduces conversion pattern for `spv.BitFiledInsert` op,
as well as some utility functions to facilitate code reading.
Since `spv.BitFiledInsert` may take both vector and integer operands,
this case was specifically handled by broadcasting values (`count`
and `offset` here) to vectors. Moreover, the types had to be converted
to same bitwidth in order to conform with LLVM dialect rules.
This was done with `zext` when extending (Note that `count` and
`offset` are treated as unsigned) and `trunc` in the opposite case.
For the latter one, truncation is safe since the op is defined only when
`count`/`offset`/their sum is less than the bitwidth of the result.
This introduces a natural bound of the value of 64, which can be
expressed as `i8`.

Reviewed By: antiagainst, ftynse

Differential Revision: https://reviews.llvm.org/D82639