[all-commits] [llvm/llvm-project] e1a31f: [AMDGPU] Control num waves per EU for implicit wor...

[pdhaliwal-amd via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: e1a31f52cd79140ac0c72f203c518bc6adf9c7b2
      https://github.com/llvm/llvm-project/commit/e1a31f52cd79140ac0c72f203c518bc6adf9c7b2
  Author: Pushpinder Singh <Pushpinder.Singh at amd.com>
  Date:   2020-07-01 (Wed, 01 Jul 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
    M llvm/test/CodeGen/AMDGPU/InlineAsmCrash.ll
    M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
    M llvm/test/CodeGen/AMDGPU/reserve-vgpr-for-sgpr-spill.ll
    M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-overflow.mir

  Log Message:
  -----------
  [AMDGPU] Control num waves per EU for implicit work-group size

Summary:
If amdgpu-flat-work-group-size is not specified in LLVM IR, the backend
uses default value of 1024. For this, minimum waves per EU should be 4.
However, backend is still setting minimum value to 1 instead of calculated
value. This is not observed normally as frontend always provide
amdgpu-flat-work-group-size attribute.

Reviewers: rampitec, b-sumner, sameerds, msearles

Reviewed By: rampitec

Subscribers: qcolombet, arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81991