[all-commits] [llvm/llvm-project] f886f0: [X86] Some CHECK-NOTs for FMA4/TBM/XOP for znver1/...

[topperc via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: f886f0724818d0127195c24e503993a6e380af5b
      https://github.com/llvm/llvm-project/commit/f886f0724818d0127195c24e503993a6e380af5b
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2020-06-30 (Tue, 30 Jun 2020)

  Changed paths:
    M clang/test/Preprocessor/predefined-arch-macros.c

  Log Message:
  -----------
  [X86] Some CHECK-NOTs for FMA4/TBM/XOP for znver1/znver2 in predefined-arch-macros.c

These features exist in earlier CPUs, but were deprecated on
znver1/znver2. While working on D82731 I accidentally copied
them from the earlier CPU. And nothing caught my mistake. Having
these additional checks would have helped.


  Commit: 3537939cda86f0b5b06233eb99ddc9eb22935008
      https://github.com/llvm/llvm-project/commit/3537939cda86f0b5b06233eb99ddc9eb22935008
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2020-06-30 (Tue, 30 Jun 2020)

  Changed paths:
    M clang/lib/Basic/Targets/X86.cpp
    M clang/lib/CodeGen/CGBuiltin.cpp
    M llvm/include/llvm/Support/X86TargetParser.def
    M llvm/include/llvm/Support/X86TargetParser.h
    M llvm/lib/Support/X86TargetParser.cpp

  Log Message:
  -----------
  [X86] Move frontend CPU feature initialization to a look up table based implementation. NFCI

This replaces the switch statement implementation in the clang's
X86.cpp with a lookup table in X86TargetParser.cpp.

I've used constexpr and copy of the FeatureBitset from
SubtargetFeature.h to store the features in a lookup table.
After the lookup the bitset is translated into strings for use
by the rest of the frontend code.

I had to modify the implementation of the FeatureBitset to avoid
bugs in gcc 5.5 constexpr handling. It seems to not like the
same array entry to be used on the left side and right hand side
of an assignment or &= or |=. I've also used uint32_t instead of
uint64_t and sized based on the X86::CPU_FEATURE_MAX.

I've initialized the features for different CPUs outside of the
table so that we can express inheritance in an adhoc way. This
was one of the big limitations of the switch and we had resorted
to labels and gotos.

Differential Revision: https://reviews.llvm.org/D82731


Compare: https://github.com/llvm/llvm-project/compare/9e49d1d9b870...3537939cda86