[all-commits] [llvm/llvm-project] 46a7f4: [SVE][CodeGen] Fix bug in DAGCombiner::reduceBuild...

[david-arm via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 46a7f4d6f4bf2cc23a410e771adb587c5968047d
      https://github.com/llvm/llvm-project/commit/46a7f4d6f4bf2cc23a410e771adb587c5968047d
  Author: David Sherwood <david.sherwood at arm.com>
  Date:   2020-06-30 (Tue, 30 Jun 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    A llvm/test/CodeGen/AArch64/sve-merging-stores.ll

  Log Message:
  -----------
  [SVE][CodeGen] Fix bug in DAGCombiner::reduceBuildVecToShuffle

When trying to reduce a BUILD_VECTOR to a SHUFFLE_VECTOR it's
important that we carefully check the vector types that led to
that BUILD_VECTOR. In the test I have attached to this commit
there is a case where the results of two SVE faddv instructions
are being stored to consecutive memory locations. With my fix,
as part of merging those stores we discover that each BUILD_VECTOR
element came from an extract of a SVE vector element and
therefore bail out.

Differential Revision: https://reviews.llvm.org/D82564