[all-commits] [llvm/llvm-project] 990f87: [AMDGPU] Define DWARF encoding for condition code ...

[Tony Tye via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 990f8702c911e444c23a5365ac22d359fc96f7b5
      https://github.com/llvm/llvm-project/commit/990f8702c911e444c23a5365ac22d359fc96f7b5
  Author: Tony <Tony.Tye at amd.com>
  Date:   2020-06-26 (Fri, 26 Jun 2020)

  Changed paths:
    M llvm/docs/AMDGPUUsage.rst

  Log Message:
  -----------
  [AMDGPU] Define DWARF encoding for condition code registers

Summary:
- Define DWARF register numbers for vector and scalar condition codes.
- Document intended purpose of reserved DWARF register numbers.

Reviewers: yaxunl, kzhuravl, arsenm, rampitec, b-sumner

Subscribers: jvesely, wdng, nhaehnle, aprantl, dstuttard, tpr, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82519