[all-commits] [llvm/llvm-project] 9bf7ca: [RISCV] Fix sysroot tests without GCC on RISC-V ho...

Thu Jun 25 23:05:53 PDT 2020

  Branch: refs/heads/release/10.x
  Home:   https://github.com/llvm/llvm-project
  Commit: 9bf7ca2c92a8c78129e503956cc4c6e9db13bec5
      https://github.com/llvm/llvm-project/commit/9bf7ca2c92a8c78129e503956cc4c6e9db13bec5
  Author: Luís Marques <luismarques at lowrisc.org>
  Date:   2020-06-25 (Thu, 25 Jun 2020)

  Changed paths:
    M clang/test/Driver/riscv32-toolchain-extra.c
    M clang/test/Driver/riscv64-toolchain-extra.c

  Log Message:
  -----------
  [RISCV] Fix sysroot tests without GCC on RISC-V hosts with GCC

D68391 added tests that check scenarios where no RISC-V GCC toolchain is
supposed to be detected. When running the tests on RISC-V hosts the system's
GCC toolchain will be detected, and the tests will fail. This patch adds a
`--gcc-toolchain` option pointing to a path where no GCC toolchain is
present, ensuring that the tests are run under the expected conditions, and
therefore are able to pass in all test environments.

Differential Revision: https://reviews.llvm.org/D75061

(cherry picked from commit 91f7f0d8e3ef2b6be07bc9621de075ff11c730c9)

  Commit: f8e49af4f1adcf457ea32e7164a126b10357cf4f
      https://github.com/llvm/llvm-project/commit/f8e49af4f1adcf457ea32e7164a126b10357cf4f
  Author: Alex Bradbury <asb at asbradbury.org>
  Date:   2020-06-25 (Thu, 25 Jun 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll

  Log Message:
  -----------
  [LegalizeTypes][RISCV] Correctly sign-extend comparison for ATOMIC_CMP_XCHG

Currently, the comparison argument used for ATOMIC_CMP_XCHG is legalised
with GetPromotedInteger, which leaves the upper bits of the value
undefind. Since this is used for comparing in an LR/SC loop with a
full-width comparison, we must sign extend it on RISC-V.

This is related to https://reviews.llvm.org/D58829, which solved the
issue for ATOMIC_CMP_SWAP_WITH_SUCCESS, but not the simpler
ATOMIC_CMP_SWAP.

This patch is a modified form of
616289ed29225c0ddfe5699c7fdf42a0fcbe0ab4 by Jessica Clarke. It localises
the changes to LegalizeIntegerTypes and avoids adding a new virtual
method to TargetLowering to avoid changing the ABI of libLLVM.so.

  Commit: 71c14cd5aee72a7502a45068ec73487d1f9e019c
      https://github.com/llvm/llvm-project/commit/71c14cd5aee72a7502a45068ec73487d1f9e019c
  Author: Jim Lin <tclin914 at gmail.com>
  Date:   2020-06-25 (Thu, 25 Jun 2020)

  Changed paths:
    M clang/lib/CodeGen/TargetInfo.cpp
    M clang/test/CodeGen/riscv64-lp64-abi.c
    M clang/test/CodeGen/riscv64-lp64f-lp64d-abi.c

  Log Message:
  -----------
  [RISCV] Fix passing two floating-point values in complex separately by two GPRs on RV64

Summary:
This patch fixed the error of counting the remaining FPRs. Complex floating-point
values should be passed by two FPRs for the hard-float ABI. If no two FPRs are
available, it should be passed via a 64-bit GPR (fp+fp). `ArgFPRsLeft` is only
decreased one while the type is complex floating-point. It causes two floating-point
values in the complex are passed separately by two GPRs.

Reviewers: asb, luismarques, lenary

Reviewed By: asb

Subscribers: rbar, johnrusso, simoncook, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, s.egerton, pzheng, sameer.abuasal, apazos, evandro, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D79770

(cherry picked from commit 7ee479a760e0a4402b4eb7fb6168768a44f66945)

  Commit: 249fef00d925ce56d7eb1f6910064a586716cba4
      https://github.com/llvm/llvm-project/commit/249fef00d925ce56d7eb1f6910064a586716cba4
  Author: Kamlesh Kumar <kamleshbhalui at gmail.com>
  Date:   2020-06-25 (Thu, 25 Jun 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll

  Log Message:
  -----------
  [RISCV64] Emit correct lib call for fp(float/double) to ui/si

Since i32 is not legal in riscv64,
it always promoted to i64 before emitting lib call and
for conversions like float/double to int and float/double to unsigned int
wrong lib call was emitted. This commit fix it using custom lowering.

Differential Revision: https://reviews.llvm.org/D80526

(cherry picked from commit 7622ea5835f0381a426e504f4c03f11733732b83)

  Commit: 5fa1f1e9f44b9f9f3ba8c777cc3fd72a7952be5e
      https://github.com/llvm/llvm-project/commit/5fa1f1e9f44b9f9f3ba8c777cc3fd72a7952be5e
  Author: kamlesh kumar <kamleshbhalui at gmail.com>
  Date:   2020-06-25 (Thu, 25 Jun 2020)

  Changed paths:
    A compiler-rt/lib/builtins/riscv/int_mul_impl.inc
    A compiler-rt/lib/builtins/riscv/muldi3.S
    M compiler-rt/lib/builtins/riscv/mulsi3.S

  Log Message:
  -----------
  [RISCV-V] Provide muldi3 builtin assembly implementation

Provides an assembly implementation of muldi3 for RISC-V, to solve bug 43388.
Since the implementation is the same as for mulsi3, that code was moved to
`riscv/int_mul_impl.inc` and is now reused by both `mulsi3.S` and `muldi3.S`.

Differential Revision: https://reviews.llvm.org/D80465

(cherry picked from commit e31ccee1b01acf703889312ee86023ff87bd39fe)

  Commit: 43ca67c05d2881d00075a15de555af1b19370294
      https://github.com/llvm/llvm-project/commit/43ca67c05d2881d00075a15de555af1b19370294
  Author: Shiva Chen <shiva at andestech.com>
  Date:   2020-06-25 (Thu, 25 Jun 2020)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/test/CodeGen/RISCV/vararg.ll

  Log Message:
  -----------
  [RISCV] Fix incorrect FP base CFI offset for variable argument functions

When the FP exists, the FP base CFI directive offset should take the size of variable arguments into account.

Differential Revision: https://reviews.llvm.org/D73862

(cherry picked from commit 64f417200e1020305f28f3c1e40691585f50f6ad)

  Commit: 04b0a4e22e3b4549f9d241f8a9f37eebecb62a31
      https://github.com/llvm/llvm-project/commit/04b0a4e22e3b4549f9d241f8a9f37eebecb62a31
  Author: Serge Guelton <sguelton at redhat.com>
  Date:   2020-06-25 (Thu, 25 Jun 2020)

  Changed paths:
    M llvm/lib/Extensions/Extensions.cpp

  Log Message:
  -----------
  Provide anchor for compiler extensions

  Commit: 69fb858731e857abcabe74dcf6db344030ca650b
      https://github.com/llvm/llvm-project/commit/69fb858731e857abcabe74dcf6db344030ca650b
  Author: Daniel Frampton <Daniel.Frampton at microsoft.com>
  Date:   2020-06-25 (Thu, 25 Jun 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    A llvm/test/CodeGen/AArch64/funclet-match-add-sub-stack.ll

  Log Message:
  -----------
  [AArch64] Fix mismatch in prologue and epilogue for funclets on Windows

The generated code for a funclet can have an add to sp in the epilogue
for which there is no corresponding sub in the prologue.

This patch removes the early return from emitPrologue that was
preventing the sub to sp, and instead conditionalizes the appropriate
parts of the rest of the function.

Fixes https://bugs.llvm.org/show_bug.cgi?id=45345

Differential Revision: https://reviews.llvm.org/D77015

(cherry picked from commit 522b4c4b88a5606b0074926e8658e7fede97c230)

  Commit: a110c3fc8cd9368627ce0386d7d16756be3d62ac
      https://github.com/llvm/llvm-project/commit/a110c3fc8cd9368627ce0386d7d16756be3d62ac
  Author: Daniel Frampton <Daniel.Frampton at microsoft.com>
  Date:   2020-06-25 (Thu, 25 Jun 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
    M llvm/test/CodeGen/AArch64/seh-finally.ll
    M llvm/test/CodeGen/AArch64/wineh-try-catch-cbz.ll
    M llvm/test/CodeGen/AArch64/wineh-try-catch-realign.ll
    M llvm/test/CodeGen/AArch64/wineh-try-catch.ll
    A llvm/test/CodeGen/AArch64/wineh-unwindhelp-via-fp.ll

  Log Message:
  -----------
  [AArch64] Change AArch64 Windows EH UnwindHelp object to be a fixed object

The UnwindHelp object is used during exception handling by runtime
code. It must be findable from a fixed offset from FP.

This change allocates the UnwindHelp object as a fixed object (as is
done for x86_64) to ensure that both the generated code and runtime
agree on the location of the object.

Fixes https://bugs.llvm.org/show_bug.cgi?id=45346

Differential Revision: https://reviews.llvm.org/D77016

(cherry picked from commit 494abe139a9aab991582f1b3f3370b99b252944c)

  Commit: b294e611271abeb5c9c49d7fb216b9bdcc323872
      https://github.com/llvm/llvm-project/commit/b294e611271abeb5c9c49d7fb216b9bdcc323872
  Author: Nick Desaulniers <ndesaulniers at google.com>
  Date:   2020-06-25 (Thu, 25 Jun 2020)

  Changed paths:
    M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
    M llvm/test/CodeGen/PowerPC/inlineasm-output-template.ll

  Log Message:
  -----------
  [PPCAsmPrinter] support 'L' output template for memory operands

Summary:
L is meant to support the second word used by 32b calling conventions for 64b arguments.

This is required for build 32b PowerPC Linux kernels after upstream
commit 334710b1496a ("powerpc/uaccess: Implement unsafe_put_user() using 'asm goto'")

Thanks for the report from @nathanchance, and reference to GCC's
implementation from @segher.

Fixes: pr/46186
Fixes: https://github.com/ClangBuiltLinux/linux/issues/1044

Reviewers: echristo, hfinkel, MaskRay

Reviewed By: MaskRay

Subscribers: MaskRay, wuzish, nemanjai, hiraditya, kbarton, steven.zhang, llvm-commits, segher, nathanchance, srhines

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81767

(cherry picked from commit 2d8e105db6bea10a6b96e4a094e73a87987ef909)

Compare: https://github.com/llvm/llvm-project/compare/d24d5c8e308e...b294e611271a