[all-commits] [llvm/llvm-project] e0c02d: [PowerPC][Power10] Implement centrifuge, vector ga...
Amy Kwan via All-commits
all-commits at lists.llvm.org
Thu Jun 25 19:35:08 PDT 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: e0c02dc9800ebd317d1369848f4e74c8f783533a
https://github.com/llvm/llvm-project/commit/e0c02dc9800ebd317d1369848f4e74c8f783533a
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2020-06-25 (Thu, 25 Jun 2020)
Changed paths:
M clang/include/clang/Basic/BuiltinsPPC.def
M clang/lib/Headers/altivec.h
M clang/lib/Sema/SemaChecking.cpp
M clang/test/CodeGen/builtins-ppc-p10.c
M clang/test/CodeGen/builtins-ppc-p10vector.c
M llvm/include/llvm/IR/IntrinsicsPowerPC.td
M llvm/lib/Target/PowerPC/PPCInstrPrefix.td
M llvm/test/CodeGen/PowerPC/p10-bit-manip-ops.ll
M llvm/test/MC/Disassembler/PowerPC/p10insts.txt
M llvm/test/MC/PowerPC/p10.s
Log Message:
-----------
[PowerPC][Power10] Implement centrifuge, vector gather every nth bit, vector evaluate Builtins in LLVM/Clang
This patch implements builtins for the following prototypes:
unsigned long long __builtin_cfuged (unsigned long long, unsigned long long);
vector unsigned long long vec_cfuge (vector unsigned long long, vector unsigned long long);
unsigned long long vec_gnb (vector unsigned __int128, const unsigned int);
vector unsigned char vec_ternarylogic (vector unsigned char, vector unsigned char, vector unsigned char, const unsigned int);
vector unsigned short vec_ternarylogic (vector unsigned short, vector unsigned short, vector unsigned short, const unsigned int);
vector unsigned int vec_ternarylogic (vector unsigned int, vector unsigned int, vector unsigned int, const unsigned int);
vector unsigned long long vec_ternarylogic (vector unsigned long long, vector unsigned long long, vector unsigned long long, const unsigned int);
vector unsigned __int128 vec_ternarylogic (vector unsigned __int128, vector unsigned __int128, vector unsigned __int128, const unsigned int);
Differential Revision: https://reviews.llvm.org/D80970
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