[all-commits] [llvm/llvm-project] b5c4e6: AMDGPU/GlobalISel: Invert parameter for div/rem lo...

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: b5c4e6c148464bd327b02ed5d0e267eb93455c19
      https://github.com/llvm/llvm-project/commit/b5c4e6c148464bd327b02ed5d0e267eb93455c19
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-06-24 (Wed, 24 Jun 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp

  Log Message:
  -----------
  AMDGPU/GlobalISel: Invert parameter for div/rem lowering function


  Commit: a44867075201b6aa3355f63445d81d66ef9daa50
      https://github.com/llvm/llvm-project/commit/a44867075201b6aa3355f63445d81d66ef9daa50
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-06-24 (Wed, 24 Jun 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sdiv.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-srem.mir
    A llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
    A llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Legalize 64-bit G_SDIV/G_SREM

Now all the divisions should be complete, although we should fix
emitting the entire common part for div/rem when you use both.


Compare: https://github.com/llvm/llvm-project/compare/6a3cffce3e80...a44867075201