[all-commits] [llvm/llvm-project] c3b3b9: [AMDGPU] Avoid redundant mode register writes

[Tim Corringham via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: c3b3b999ec9ef7e8d9367848db82c97a0369473f
      https://github.com/llvm/llvm-project/commit/c3b3b999ec9ef7e8d9367848db82c97a0369473f
  Author: Tim Corringham <tcorring at amd.com>
  Date:   2020-06-24 (Wed, 24 Jun 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIModeRegister.cpp
    M llvm/test/CodeGen/AMDGPU/mode-register.mir

  Log Message:
  -----------
  [AMDGPU] Avoid redundant mode register writes

Summary:
The SIModeRegister pass attempts to generate the minimal number of
writes to the mode register. However it was failing to correctly
deal with some loops, resulting in some redundant setreg instructions
being inserted.

This change amends the pass to avoid generating these redundant
instructions.

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82215