[all-commits] [llvm/llvm-project] 3d6cab: [AArch64][SVE] Add bfloat16 support to load intrin...

kmclaughlin-arm via All-commits all-commits at lists.llvm.org
Wed Jun 24 02:34:26 PDT 2020


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 3d6cab271c7cecf105b77834d837ccd4406700d7
      https://github.com/llvm/llvm-project/commit/3d6cab271c7cecf105b77834d837ccd4406700d7
  Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
  Date:   2020-06-24 (Wed, 24 Jun 2020)

  Changed paths:
    M clang/include/clang/Basic/arm_sve.td
    A clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c
    A clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c
    A clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c
    A clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c
    A clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
    M llvm/test/CodeGen/AArch64/sve-intrinsics-ld1-addressing-mode-reg-imm.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-ld1-addressing-mode-reg-reg.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-ld1.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-loads-ff.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-loads-nf.ll
    M llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll
    M llvm/test/CodeGen/AArch64/sve-masked-ldst-nonext.ll

  Log Message:
  -----------
  [AArch64][SVE] Add bfloat16 support to load intrinsics

Summary:
Bfloat16 support added for the following intrinsics:
 - LD1
 - LD1RQ
 - LDNT1
 - LDNF1
 - LDFF1

Reviewers: sdesmalen, c-rhodes, efriedma, stuij, fpetrogalli, david-arm

Reviewed By: fpetrogalli

Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl, danielkiss, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D82298




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