[all-commits] [llvm/llvm-project] e4bc08: [mlir] Allow vector.contract to have mixed types o...

[Thomas via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: e4bc08f0121e4bf152592679a64af14c7cbfdba7
      https://github.com/llvm/llvm-project/commit/e4bc08f0121e4bf152592679a64af14c7cbfdba7
  Author: Thomas Raoux <thomasraoux at google.com>
  Date:   2020-06-19 (Fri, 19 Jun 2020)

  Changed paths:
    M mlir/include/mlir/Dialect/Vector/VectorOps.td
    M mlir/lib/Dialect/Vector/VectorTransforms.cpp
    M mlir/test/Dialect/Vector/invalid.mlir
    M mlir/test/Dialect/Vector/ops.mlir

  Log Message:
  -----------
  [mlir] Allow vector.contract to have mixed types operands

Allow lhs and rhs to have different type than accumulator/destination. Some
hardware like GPUs support natively operations like uint8xuint8xuint32.

Differential Revision: https://reviews.llvm.org/D82069