[all-commits] [llvm/llvm-project] ad879b: [X86] Change signature of EmitNops. NFC.

[Alexandre Ganea via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: ad879b31f054116a9df4efceddee967a2b6247bb
      https://github.com/llvm/llvm-project/commit/ad879b31f054116a9df4efceddee967a2b6247bb
  Author: Alexandre Ganea <alexandre.ganea at ubisoft.com>
  Date:   2020-06-17 (Wed, 17 Jun 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86MCInstLower.cpp

  Log Message:
  -----------
  [X86] Change signature of EmitNops. NFC.

This is to support https://reviews.llvm.org/D81301.


  Commit: acb30f6856c34b929b30bfd76dc938a1087af0a9
      https://github.com/llvm/llvm-project/commit/acb30f6856c34b929b30bfd76dc938a1087af0a9
  Author: Alexandre Ganea <alexandre.ganea at ubisoft.com>
  Date:   2020-06-17 (Wed, 17 Jun 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86MCInstLower.cpp
    M llvm/test/CodeGen/X86/patchable-function-entry.ll
    M llvm/test/CodeGen/X86/patchable-prologue.ll

  Log Message:
  -----------
  [X86] For 32-bit targets, emit two-byte NOP when possible

In order to support hot-patching, we need to make sure the first emitted instruction in a function is a two-byte+ op. This is already the case on x86_64, which seems to always emit two-byte+ ops. However on 32-bit targets this wasn't the case.

PATCHABLE_OP now lowers to a XCHG AX, AX, (66 90) like MSVC does. However when targetting pentium3 (/arch:SSE) or i386 (/arch:IA32) targets, we generate MOV EDI,EDI (8B FF) like MSVC does. This is for compatiblity reasons with older tools that rely on this two byte pattern.

Differential Revision: https://reviews.llvm.org/D81301


Compare: https://github.com/llvm/llvm-project/compare/c8b082a3abe4...acb30f6856c3