[all-commits] [llvm/llvm-project] ffe8f6: [ARM][MachineOutliner] Fix no-lr-save testcase.

[yroux via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: ffe8f6d33bccd272346099be260f1a0528bab061
      https://github.com/llvm/llvm-project/commit/ffe8f6d33bccd272346099be260f1a0528bab061
  Author: Yvan Roux <yvan.roux at linaro.org>
  Date:   2020-06-15 (Mon, 15 Jun 2020)

  Changed paths:
    M llvm/test/CodeGen/ARM/machine-outliner-no-lr-save.mir

  Log Message:
  -----------
  [ARM][MachineOutliner] Fix no-lr-save testcase.

Now that saving LR into a register is handled, some register constraints
are needed to keep machine-outliner-no-lr-save.mir meaningful.