[all-commits] [llvm/llvm-project] 669066: [ARM][MachineOutliner] Add LR RegSave mode.

[yroux via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 669066de650a10a4a1befea5bec9b1c8c05e51cf
      https://github.com/llvm/llvm-project/commit/669066de650a10a4a1befea5bec9b1c8c05e51cf
  Author: Yvan Roux <yvan.roux at linaro.org>
  Date:   2020-06-15 (Mon, 15 Jun 2020)

  Changed paths:
    M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
    M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
    A llvm/test/CodeGen/ARM/machine-outliner-lr-regsave.mir

  Log Message:
  -----------
  [ARM][MachineOutliner] Add LR RegSave mode.

Outline chunks of code which need to save and restore the link register
when a spare register can be used to it.

Differential Revision: https://reviews.llvm.org/D80127