[all-commits] [llvm/llvm-project] 93264a: [X86] Enable the EVEX->VEX compression pass at -O0.

[topperc via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 93264a2e4fc21b6e5efa705198d577cccef6dac8
      https://github.com/llvm/llvm-project/commit/93264a2e4fc21b6e5efa705198d577cccef6dac8
  Author: Craig Topper <craig.topper at intel.com>
  Date:   2020-06-13 (Sat, 13 Jun 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86TargetMachine.cpp
    M llvm/test/CodeGen/X86/O0-pipeline.ll
    M llvm/test/CodeGen/X86/fast-isel-vecload.ll

  Log Message:
  -----------
  [X86] Enable the EVEX->VEX compression pass at -O0.

A lot of what EVEX->VEX does is equivalent to what the
prioritization in the assembly parser does. When an AVX mnemonic
is used without any EVEX features or XMM16-31, the parser will
pick the VEX encoding.

Since codegen doesn't go through the parser, we should also
use VEX instructions when we can so that the code coming out of
integrated assembler matches what you'd get from outputing an
assembly listing and parsing it.

The pass early outs if AVX isn't enabled and uses TSFlags to
check for EVEX instructions before doing the more costly table
lookups. Hopefully that's enough to keep this from impacting
-O0 compile times.