[all-commits] [llvm/llvm-project] 34fef0: [VE] Support convert instructions in MC layer

[Kazushi Marukawa via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 34fef0c980446c3ea9595328e0e525db222870f0
      https://github.com/llvm/llvm-project/commit/34fef0c980446c3ea9595328e0e525db222870f0
  Author: Kazushi (Jam) Marukawa <marukawa at nec.com>
  Date:   2020-06-10 (Wed, 10 Jun 2020)

  Changed paths:
    M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
    M llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
    M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
    M llvm/lib/Target/VE/VE.h
    M llvm/lib/Target/VE/VEInstrInfo.td
    A llvm/test/MC/VE/CVTDL.s
    A llvm/test/MC/VE/CVTDQ.s
    A llvm/test/MC/VE/CVTDS.s
    A llvm/test/MC/VE/CVTDW.s
    A llvm/test/MC/VE/CVTLD.s
    A llvm/test/MC/VE/CVTQD.s
    A llvm/test/MC/VE/CVTQS.s
    A llvm/test/MC/VE/CVTSD.s
    A llvm/test/MC/VE/CVTSQ.s
    A llvm/test/MC/VE/CVTSW.s
    A llvm/test/MC/VE/CVTWD.s
    A llvm/test/MC/VE/CVTWS.s

  Log Message:
  -----------
  [VE] Support convert instructions in MC layer

Summary:
Add CVTSQ/CVTDQ/CVTQD/CVTQS instructions.  Add regression tests for
them and other convert instructions of asmparser, mccodeemitter, and
disassembler.  In order to add those instructions, support RD operands
in asmparser, mccodeemitter, and disassembler.

Differential Revision: https://reviews.llvm.org/D81536