[all-commits] [llvm/llvm-project] 2fea3f: [MachineScheduler] Update available queue on the f...
David Green via All-commits
all-commits at lists.llvm.org
Tue Jun 9 11:15:20 PDT 2020
Branch: refs/heads/master
Home: https://github.com/llvm/llvm-project
Commit: 2fea3fe41c5a177d019dd99fb1b43d767eccde24
https://github.com/llvm/llvm-project/commit/2fea3fe41c5a177d019dd99fb1b43d767eccde24
Author: David Green <david.green at arm.com>
Date: 2020-06-09 (Tue, 09 Jun 2020)
Changed paths:
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/test/CodeGen/AArch64/misched-fusion-aes.ll
M llvm/test/CodeGen/PowerPC/2007-01-15-AsmDialect.ll
M llvm/test/CodeGen/PowerPC/2008-10-28-f128-i32.ll
M llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
M llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
M llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll
M llvm/test/CodeGen/PowerPC/inc-of-add.ll
M llvm/test/CodeGen/PowerPC/ppc32-skip-regs.ll
M llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/PowerPC/pr43976.ll
M llvm/test/CodeGen/PowerPC/spe.ll
M llvm/test/CodeGen/PowerPC/sub-of-not.ll
M llvm/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/PowerPC/vec_splat.ll
Log Message:
-----------
[MachineScheduler] Update available queue on the first mop of a new cycle
If a resource can be held for multiple cycles in the schedule model
then an instruction can be placed into the available queue, another
instruction can be scheduled, but the first will not be taken back out if
the two instructions hazard. To fix this make sure that we update the
available queue even on the first MOp of a cycle, pushing available
instructions back into the pending queue if they now conflict.
This happens with some downstream schedules we have around MVE
instruction scheduling where we use ResourceCycles=[2] to show the
instruction executing over two beats. Apparently the test changes here
are OK too.
Differential Revision: https://reviews.llvm.org/D76909
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