[all-commits] [llvm/llvm-project] 117c0d: [VE] Support branch instructions in MC layer

[Kazushi Marukawa via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 117c0d7c1c12e5c82e0f5498fec511e8ae08d9ca
      https://github.com/llvm/llvm-project/commit/117c0d7c1c12e5c82e0f5498fec511e8ae08d9ca
  Author: Kazushi (Jam) Marukawa <marukawa at nec.com>
  Date:   2020-06-05 (Fri, 05 Jun 2020)

  Changed paths:
    M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
    M llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
    M llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
    M llvm/lib/Target/VE/VE.h
    M llvm/lib/Target/VE/VEInstrInfo.cpp
    M llvm/lib/Target/VE/VEInstrInfo.td
    A llvm/test/MC/VE/BC.s
    A llvm/test/MC/VE/BCR.s
    A llvm/test/MC/VE/BSIC.s

  Log Message:
  -----------
  [VE] Support branch instructions in MC layer

Summary:
Add regression tests of asmparser, mccodeemitter, and disassembler for
branch instructions.  In order to support them, we enhance asmparser
by adding splitting mnemonic mechanism, e.g. "bgt.l.t" into "b", "gt",
and ".l.t", and parsing mechanism for AS style memory addressing.
We also implment encoding and decoding mechanism for branch instructions.

Differential Revision: https://reviews.llvm.org/D81215