[all-commits] [llvm/llvm-project] ea80b4: [DAG] SimplifyDemandedBits - peek through SHL if w...

Simon Pilgrim via All-commits all-commits at lists.llvm.org
Wed Jun 3 08:12:52 PDT 2020


  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: ea80b40669457d474e79bec1131f2b56cd795893
      https://github.com/llvm/llvm-project/commit/ea80b40669457d474e79bec1131f2b56cd795893
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-06-03 (Wed, 03 Jun 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/AMDGPU/sdiv.ll
    M llvm/test/CodeGen/X86/bitcast-setcc-128.ll
    M llvm/test/CodeGen/X86/funnel-shift.ll
    M llvm/test/CodeGen/X86/promote-cmp.ll
    M llvm/test/CodeGen/X86/sdiv_fix_sat.ll
    M llvm/test/CodeGen/X86/vector-mulfix-legalize.ll
    M llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
    M llvm/test/CodeGen/X86/vector-reduce-or-bool.ll

  Log Message:
  -----------
  [DAG] SimplifyDemandedBits - peek through SHL if we only demand sign bits.

If we're only demanding the (shifted) sign bits of the shift source value, then we can use the value directly.

This handles SimplifyDemandedBits/SimplifyMultipleUseDemandedBits for both ISD::SHL and X86ISD::VSHLI.

Differential Revision: https://reviews.llvm.org/D80869


  Commit: 3653c1bbed012a8a0441ad854d4cb9e51093857d
      https://github.com/llvm/llvm-project/commit/3653c1bbed012a8a0441ad854d4cb9e51093857d
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2020-06-03 (Wed, 03 Jun 2020)

  Changed paths:
    M llvm/include/llvm/Analysis/ScalarEvolution.h

  Log Message:
  -----------
  Fix gcc -Wdocumentation warning. NFC.

gcc doesn't recognise @llvm.experimental.guard as a code snippet


Compare: https://github.com/llvm/llvm-project/compare/04abbb3a7818...3653c1bbed01


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