[all-commits] [llvm/llvm-project] 452e0d: AMDGPU: Don't run mode switches with exec 0

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 452e0d9023ca9a747a3646a42cea13d66b689de7
      https://github.com/llvm/llvm-project/commit/452e0d9023ca9a747a3646a42cea13d66b689de7
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIInstrInfo.h
    A llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-mode-def.mir
    M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll

  Log Message:
  -----------
  AMDGPU: Don't run mode switches with exec 0

These are scalar instructions that change vector instructions, so they
should not be executed without any active lanes.

The implementation of -amdgpu-skip-threshold also seem to be backwards
from expected, since decreasing it prevents removal.


  Commit: 4b1f6cdbf930b0a47fab334431dca0b964614b19
      https://github.com/llvm/llvm-project/commit/4b1f6cdbf930b0a47fab334431dca0b964614b19
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SOPInstructions.td
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
    M llvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll
    M llvm/test/CodeGen/AMDGPU/no-remat-indirect-mov.mir
    A llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-gpr-idx-mode.mir
    M llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir

  Log Message:
  -----------
  AMDGPU: Don't run indexing mode switches with exec = 0

Add mode defs rather than special casing this like some of the other
instructions.


  Commit: cdd30542551a4c1af64b819f50982f197b61e28e
      https://github.com/llvm/llvm-project/commit/cdd30542551a4c1af64b819f50982f197b61e28e
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/spill-agpr.ll

  Log Message:
  -----------
  AMDGPU: Fix a test to be more stable

The chained unconditional branches can be eliminated and it's not
relevant to the test.


Compare: https://github.com/llvm/llvm-project/compare/635cde6e8c08...cdd30542551a