[all-commits] [llvm/llvm-project] ec2e9c: [VE] Support I32/F32 registers in assembler parser

[Kazushi Marukawa via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: ec2e9ce73e6c2d70523f7e51a23bf07f998ebecd
      https://github.com/llvm/llvm-project/commit/ec2e9ce73e6c2d70523f7e51a23bf07f998ebecd
  Author: Kazushi (Jam) Marukawa <marukawa at nec.com>
  Date:   2020-06-02 (Tue, 02 Jun 2020)

  Changed paths:
    M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
    A llvm/test/MC/VE/LD.s
    A llvm/test/MC/VE/ST.s

  Log Message:
  -----------
  [VE] Support I32/F32 registers in assembler parser

Summary:
Support I32/F32 registers in assembler parser and add regression tests of LD/ST
instructions.

Differential Revision: https://reviews.llvm.org/D80777