[all-commits] [llvm/llvm-project] 885782: [X86] Move MMX_SET0 pattern into the instruction d...

[topperc via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 8857822452c758805e8bb33ecc877d8d0cce1660
      https://github.com/llvm/llvm-project/commit/8857822452c758805e8bb33ecc877d8d0cce1660
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-05-30 (Sat, 30 May 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrMMX.td

  Log Message:
  -----------
  [X86] Move MMX_SET0 pattern into the instruction definition. NFC


  Commit: efc5857b0b121ffd0b74fcd7aa8c48419a3fe4fc
      https://github.com/llvm/llvm-project/commit/efc5857b0b121ffd0b74fcd7aa8c48419a3fe4fc
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-05-30 (Sat, 30 May 2020)

  Changed paths:
    M llvm/test/CodeGen/X86/pr23246.ll

  Log Message:
  -----------
  [X86] Autogenerate complete checks. NFC


  Commit: 1ecf39d607acdb04c2bb5155e5f7265db2484511
      https://github.com/llvm/llvm-project/commit/1ecf39d607acdb04c2bb5155e5f7265db2484511
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-05-30 (Sat, 30 May 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp

  Log Message:
  -----------
  [X86] Fix a place where we created MOVQ2DQ with a DstVT other than v2i64.

The type profile and isel pattern have this type declared as
being MVT::v2i64. But isel skips the explicit type check due to
the type profile.


  Commit: af1accdd860d4e1768a1f56a8651ae4d13445e14
      https://github.com/llvm/llvm-project/commit/af1accdd860d4e1768a1f56a8651ae4d13445e14
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-05-30 (Sat, 30 May 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/mmx-cvt.ll
    M llvm/test/CodeGen/X86/vec_insert-7.ll

  Log Message:
  -----------
  [X86] Teach computeKnownBitsForTargetNode that the upper half of X86ISD::MOVQ2DQ is all zero.


  Commit: a4dd45b7d09d8c12b87eaa0e6d1a92ce2b0defe0
      https://github.com/llvm/llvm-project/commit/a4dd45b7d09d8c12b87eaa0e6d1a92ce2b0defe0
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-05-30 (Sat, 30 May 2020)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp

  Log Message:
  -----------
  [DAGCombiner] Move debug message and statistic update into CommitTargetLoweringOpt.

This code was repeated in two callers of CommitTargetLoweringOpt.
But CommitTargetLoweringOpt is also called from TargetLowering.
We should print a message for those calls to. So sink the
repeated code into CommitTargetLoweringOpt to catch those calls.


  Commit: 7c3b8077cc3feed2de3de6f3efb0627d619d1434
      https://github.com/llvm/llvm-project/commit/7c3b8077cc3feed2de3de6f3efb0627d619d1434
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-05-30 (Sat, 30 May 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86InstrMMX.td

  Log Message:
  -----------
  [X86] Add DAG combine to turn (v2i64 (scalar_to_vector (i64 (bitconvert (mmx))))) to MOVQ2DQ. Remove unneeded isel patterns.

We already had a DAG combine for (mmx (bitconvert (i64 (extractelement v2i64))))
to MOVDQ2Q.

Remove patterns for MMX_MOVQ2DQrr/MMX_MOVDQ2Qrr that use
scalar_to_vector/extractelement involving i64 scalar type with
v2i64 and x86mmx.


Compare: https://github.com/llvm/llvm-project/compare/ce1fadca608f...7c3b8077cc3f