[all-commits] [llvm/llvm-project] b726d0: [AMDGPU] Reject moving PHI to VALU if the only VGP...

[alex-t via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: b726d071b4aa46004228fc38ee5bfd167f999bfe
      https://github.com/llvm/llvm-project/commit/b726d071b4aa46004228fc38ee5bfd167f999bfe
  Author: alex-t <alexander.timofeev at amd.com>
  Date:   2020-05-28 (Thu, 28 May 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
    A llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir

  Log Message:
  -----------
  [AMDGPU] Reject moving PHI to VALU if the only VGPR input originated from move immediate

Summary:
PHIs result register class is set to VGPR or SGPR depending on the cross block value divergence.
         In some cases uniform PHI need to be converted to return VGPR to prevent the oddnumber of moves values from VGPR to SGPR and back.
         PHI should certainly return VGPR if it has at least one VGPR input. This change adds the exception.
         We don't want to convert uniform PHI to VGPRs in case the only VGPR input is a VGPR to SGPR COPY and definition od the
         source VGPR in this COPY is move immediate.

  bb.0:

     %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
     %2:sreg_32 = .....

  bb.1:
     %3:sreg_32 = PHI %1, %bb.3, %2, %bb.1
     S_BRANCH %bb.3

  bb.3:
     %1:sreg_32 = COPY %0
     S_BRANCH %bb.2

Reviewers: rampitec

Reviewed By: rampitec

Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80434