[all-commits] [llvm/llvm-project] b4978b: [X86] Use SIMD_EXC to remove some let statements i...

[topperc via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: b4978b24445cdc33311bbdb661060f9d9229efe9
      https://github.com/llvm/llvm-project/commit/b4978b24445cdc33311bbdb661060f9d9229efe9
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-05-26 (Tue, 26 May 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrSSE.td

  Log Message:
  -----------
  [X86] Use SIMD_EXC to remove some let statements in tablegen. NFCI


  Commit: 84cf8ed8fd3f950b6e30225cae6f092da768cbe6
      https://github.com/llvm/llvm-project/commit/84cf8ed8fd3f950b6e30225cae6f092da768cbe6
  Author: Craig Topper <craig.topper at gmail.com>
  Date:   2020-05-26 (Tue, 26 May 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
    M llvm/lib/Target/X86/X86InstrInfo.td
    M llvm/lib/Target/X86/X86InstrSSE.td
    M llvm/lib/Target/X86/X86IntrinsicsInfo.h

  Log Message:
  -----------
  [X86] Lower sse_cmp_ss/sse2_cmp_sd intrinsics to X86ISD::FSETCC with vector types.

Isel match that instead of the intrinsic. Similar to what we do
for avx512.

Trying to move more intrinsics to target specific ISD opcodes.
Hoping to add DAG combines to shrink simple loads going into
scalar intrinsics that only read 32 or 64 bits.


Compare: https://github.com/llvm/llvm-project/compare/6565b5858444...84cf8ed8fd3f