[all-commits] [llvm/llvm-project] 62fb3f: [AMDGPU] Define 6 dword subregs

[Stanislav Mekhanoshin via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 62fb3fa6d9c007385ce61e1203e6830fa4172bdd
      https://github.com/llvm/llvm-project/commit/62fb3fa6d9c007385ce61e1203e6830fa4172bdd
  Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
  Date:   2020-05-22 (Fri, 22 May 2020)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
    M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir

  Log Message:
  -----------
  [AMDGPU] Define 6 dword subregs

This prevents autogeneration of degenerate names for these.

Differential Revision: https://reviews.llvm.org/D80451