[all-commits] [llvm/llvm-project] 7019ce: [CodeGen] Add support for multiple memory operands...

[Jean-Michel Gorius via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 7019cea26dfef5882c96f278c32d0f9c49a5e516
      https://github.com/llvm/llvm-project/commit/7019cea26dfef5882c96f278c32d0f9c49a5e516
  Author: Jean-Michel Gorius <jean-michel.gorius at orange.fr>
  Date:   2020-05-21 (Thu, 21 May 2020)

  Changed paths:
    M llvm/lib/CodeGen/MachineInstr.cpp
    M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
    M llvm/test/CodeGen/AArch64/merge-store-dependency.ll
    M llvm/test/CodeGen/ARM/big-endian-neon-fp16-bitconv.ll
    M llvm/test/CodeGen/ARM/cortex-a57-misched-vldm-wrback.ll
    M llvm/test/CodeGen/ARM/cortex-a57-misched-vstm-wrback.ll
    M llvm/test/CodeGen/ARM/cortex-a57-misched-vstm.ll
    M llvm/test/CodeGen/Thumb2/mve-float32regloops.ll
    M llvm/test/CodeGen/Thumb2/mve-phireg.ll
    M llvm/test/CodeGen/Thumb2/mve-vst3.ll
    M llvm/test/CodeGen/Thumb2/umulo-128-legalisation-lowering.ll
    A llvm/test/CodeGen/X86/instr-sched-multiple-memops.mir
    M llvm/test/CodeGen/X86/store_op_load_fold2.ll

  Log Message:
  -----------
  [CodeGen] Add support for multiple memory operands in MachineInstr::mayAlias

Summary:
To support all targets, the mayAlias member function needs to support instructions with multiple operands.

This revision also changes the order of the emitted instructions in some test cases.

Reviewers: efriedma, hfinkel, craig.topper, dmgreen

Reviewed By: efriedma

Subscribers: MatzeB, dmgreen, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80161