[all-commits] [llvm/llvm-project] bf1f5c: CET for Exception Handle

[xiangzh1 via All-commits]

  Branch: refs/heads/release/10.x
  Home:   https://github.com/llvm/llvm-project
  Commit: bf1f5caf20281eb312e1bcb0a9d32bd6a5a2e289
      https://github.com/llvm/llvm-project/commit/bf1f5caf20281eb312e1bcb0a9d32bd6a5a2e289
  Author: Pengfei Wang <pengfei.wang at intel.com>
  Date:   2020-05-18 (Mon, 18 May 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
    A llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll

  Log Message:
  -----------
  CET for Exception Handle

Summary:
Bug fix for https://bugs.llvm.org/show_bug.cgi?id=45182
Exception handle may indirectly jump to catch pad, So we should add ENDBR instruction before catch pad instructions.

Reviewers: craig.topper, hjl.tools, LuoYuanke, annita.zhang, pengfei

Reviewed By: LuoYuanke

Subscribers: hiraditya, llvm-commits

Patch By: Xiang Zhang (xiangzhangllvm)

Differential Revision: https://reviews.llvm.org/D76190

(cherry picked from commit 974d649f8eaf3026ccb9d1b77bdec55da25366e5)


  Commit: 4a89d0de5e9d8202a8eb4b9c1f34969fb796465a
      https://github.com/llvm/llvm-project/commit/4a89d0de5e9d8202a8eb4b9c1f34969fb796465a
  Author: Xiang1 Zhang <xiang1.zhang at intel.com>
  Date:   2020-05-18 (Mon, 18 May 2020)

  Changed paths:
    M llvm/lib/Target/X86/X86IndirectBranchTracking.cpp
    M llvm/lib/Target/X86/X86TargetMachine.cpp
    M llvm/lib/Target/X86/X86TargetMachine.h
    A llvm/test/CodeGen/X86/indirect-branch-tracking-cm-lager.ll

  Log Message:
  -----------
  Enable IBT(Indirect Branch Tracking) in JIT with CET(Control-flow Enforcement Technology)

Do not commit the llvm/test/ExecutionEngine/MCJIT/cet-code-model-lager.ll because it will
cause build bot fail(not suitable for window 32 target).

Summary:
This patch comes from H.J.'s https://github.com/hjl-tools/llvm-project/commit/2bd54ce7fa9e94fcd1118b948e14d1b6fc54dfd2

**This patch fix the failed llvm unit tests which running on CET machine. **(e.g. ExecutionEngine/MCJIT/MCJITTests)

The reason we enable IBT at "JIT compiled with CET" is mainly that:  the JIT don't know the its caller program is CET enable or not.
If JIT's caller program is non-CET, it is no problem JIT generate CET code or not.
But if JIT's caller program is CET enabled,  JIT must generate CET code or it will cause Control protection exceptions.

I have test the patch at llvm-unit-test and llvm-test-suite at CET machine. It passed.
and H.J. also test it at building and running VNCserver(Virtual Network Console), it works too.
(if not apply this patch, VNCserver will crash at CET machine.)

Reviewers: hjl.tools, craig.topper, LuoYuanke, annita.zhang, pengfei

Reviewed By: LuoYuanke

Subscribers: tstellar, efriedma, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D76900

(cherry picked from commit 01a32f2bd3fad4331cebe9f4faa270d7c082d281)


Compare: https://github.com/llvm/llvm-project/compare/964da8185568...4a89d0de5e9d