[all-commits] [llvm/llvm-project] cd5945: [AArch64][GlobalISel] Make LR livein to entry in l...

[Jessica Paquette via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: cd59458f27af9f441a8e3646e985ffb92700fba5
      https://github.com/llvm/llvm-project/commit/cd59458f27af9f441a8e3646e985ffb92700fba5
  Author: Jessica Paquette <jpaquette at apple.com>
  Date:   2020-05-11 (Mon, 11 May 2020)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/select-returnaddress-liveins.mir

  Log Message:
  -----------
  [AArch64][GlobalISel] Make LR livein to entry in llvm.returnaddress selection

This fixes a couple verifier failures on this bot:

http://green.lab.llvm.org/green/job/test-suite-verify-machineinstrs-aarch64-globalisel-O0-g/

The failures show up in eeprof-1.c and pr17377.c in the GCC C Torture Suite.

Specifically:

*** Bad machine code: MBB has allocatable live-in, but isn't entry or landing-pad. ***
- function:    foo
- basic block: %bb.3 if.end (0x7fac7106dfc8)
- p. register: $lr

and

*** Bad machine code: Using an undefined physical register ***
- function:    f
- basic block: %bb.1 entry (0x7f8941092588)
- instruction: %18:gpr64 = COPY $lr
- operand 1:   $lr

Unlike SDAG, we were setting LR as a live in to the block containing the
returnaddress.

Also, this ensures that we don't add LR as a livein to the entry block twice.
In MachineBasicBlock.h there's a comment saying

"Note that it is an error to add the same register to the same set more than
once unless the intention is to call sortUniqueLiveIns after all registers are
added."

so it's probably good to avoid adding LR twice.

Surprisingly the verifier doesn't complain about that. Maybe it should.

Differential Revision: https://reviews.llvm.org/D79657