[all-commits] [llvm/llvm-project] 699996: GlobalISel: Move code into lowering for G_MERGE_VA...

[Matt Arsenault via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 69999605ee91a4216ba1a29e2daa748d91212bad
      https://github.com/llvm/llvm-project/commit/69999605ee91a4216ba1a29e2daa748d91212bad
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2020-05-09 (Sat, 09 May 2020)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def-s1025.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant-32bit.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-merge-values.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-constant-32bit.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-constant-32bit.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll

  Log Message:
  -----------
  GlobalISel: Move code into lowering for G_MERGE_VALUES

Currently this code exists in widenScalar for G_MERGE_VALUE
sources. I'm not sure if the existing expansion in widenScalar should
be removed or not. The widenScalar variant tries to extend to the
requested size, but this just uses the original bitwidth.