[all-commits] [llvm/llvm-project] 947f78: [SystemZ] Fix/optimize vec_load_len and related in...

[Ulrich Weigand via All-commits]

  Branch: refs/heads/master
  Home:   https://github.com/llvm/llvm-project
  Commit: 947f78ac27f4ea52a443ba9d5983cfe3eaf51148
      https://github.com/llvm/llvm-project/commit/947f78ac27f4ea52a443ba9d5983cfe3eaf51148
  Author: Ulrich Weigand <ulrich.weigand at de.ibm.com>
  Date:   2020-05-06 (Wed, 06 May 2020)

  Changed paths:
    M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZISelLowering.h
    M llvm/lib/Target/SystemZ/SystemZInstrVector.td
    M llvm/test/CodeGen/SystemZ/vec-intrinsics-01.ll
    M llvm/test/CodeGen/SystemZ/vec-intrinsics-02.ll

  Log Message:
  -----------
  [SystemZ] Fix/optimize vec_load_len and related intrinsics

When using vec_load/store_len_r with an immediate length operand
of 16 or larger, LLVM will currently emit an VLRL/VSTRL instruction
with that immediate.  This creates a valid encoding (which should be
supported by the assembler), but always traps at runtime.  This patch
fixes this by not creating VLRL/VSTRL in those cases.

This would result in loading the length into a register and
calling VLRLR/VSTRLR instead.  However, these operations with
a length of 15 or larger are in fact simply equivalent to a
full vector load or store.  And in fact the same holds true for
vec_load/store_len as well.

Therefore, add a DAGCombine rule to replace those operations with
plain vector loads or stores if the length is known at compile
time and equal or larger to 15.